1. Field of the Disclosure
Typically, integrated circuit memories are organized into one or more arrays or blocks, each including a matrix of rows and columns, with a memory cell located at each intersection of a row and a column. The case of non-volatile memory arrays, such as flash memory arrays, is no different, and includes a plurality of rows or word lines and a plurality of columns or bit lines. A non-volatile memory bit cell is located at the intersection of each of the word lines and bit lines within the memory array.
A common problem associated with flash memory arrays is the presence of mobile ion contaminates. Such mobile ion contaminates may originate from outside of the memory block, and travel freely to locations within the memory block. Mobile ion contaminates can be attracted to the charges stored on non-volatile memory cells and can change the charge state of the memory cell thereby causing data corruption and data loss.
Accordingly, the industry needs a non-volatile memory capable of reducing the data retention fall out effects cause by mobile ion contaminates. Particularly, the industry continues to need an apparatus and method for operating a non-volatile memory array with improved data retention capabilities in light of mobile ion contaminates.
2. Description of the Related Art